The present invention relates generally to the fabrication of ferroelectric RAM (FeRAM) memory devices and, more particularly, to a method of maximizing the ferroelectric properties of Lead Germanium Oxide (PGO) thin films by epitaxially growing a PGO film with a c-axis orientation on a conductive electrode.
In recent years, the interest in ferroelectric materials for nonvolatile random access memory application (NvRAMs) has intensified. To meet the requirements for these memory applications, ferroelectric capacitors should have small size, low coercive field, high remanent polarization, low fatigue rate, and low leakage current. Some of the candidate ferroelectric materials under investigation for these applications are perovskite ferroelectrics such as PbZr.sub.1-x Ti.sub.x O.sub.3 (PZT) or doped PZT, BaTiO.sub.3, SrTiO.sub.3, etc. These materials have a high Curie temperature and promising ferroelectrical properties such as large remanent polarization and low coercive field. However, these perovskite ferroelectrics are known to suffer from serious degradation problems such as fatigue (loss of switchable polarization with increasing reversal of polarization), aging, and leakage current, all of which affect the lifetime of the devices.
Many researchers are trying to improve the above-mentioned materials. An alternative approach is to find new ferroelectric materials. SrBi.sub.2 Ta.sub.2 O.sub.9 (SBT) is a one of the new materials, which has fatigue-free properties. However, SBT must be deposited or annealed at temperatures greater than 750.degree. C., which limits its applications.
Ferroelectric thin films for use in non-volatile memories have drawn much attention in recent years due to their bi-stable nature. Most of the studies on Ferroelectric Random Access Memories (FRAMs) have been concentrated on the memory structure with one transistor and one capacitor. The capacitor is made of a thin ferroelectric film sandwiched between two conductive electrodes (usually Pt). The circuit configuration and read/write sequence of this type memory are similar to that of DRAMs except no data refreshing is necessary in FRAMs. Therefore, the stored data are destroyed and must be restored after every reading. This reading process is named destructive read out (DRO). The fatigue problem observed in ferroelectric capacitor, therefore, becomes one of the major obstacles that limit the realization of these memories on a commercial scale. Fatigue is the decrease of switchable polarization (stored nonvolatile charge) with an increased number of switching cycles. The number of switching cycles is the summation of writing and reading pulses.
Another area of interest related to ferroelectric non-volatile memory study is the deposition ferroelectric thin film directly onto the gate area of FET, to form a ferroelectric-gate controlled FET. The ferroelectric-gate controlled device, such as metal-ferroelectric-silicon (MSF) FET, have been studied since the 1950s. Various modified MFSFET structures have been proposed, for example: Metal-Ferroelectric-Insulator-Silicon (MFIS) FET, Metal-Ferroelectric-Metal-Silicon (MFMS) FET, and Metal-Ferroelectric- Metal-Oxide-Silicon (MFMOS) FET. FRAMs with MFSFET structures have two major advantages over the 1T-1C configuration: (1) smaller memory cell territory in MFSFET, and (2) non-destructive read out (NDRO). The latter enables the MFSFET device to be read thousands of times without switching the ferroelectric polarization. Therefore, the fatigue is not the major issue in MFSFET devices.
Regardless the advantages in MFSFET devices over the 1T-1C FRAMs, little progress has been reported in the realization of practical MFSFET devices. This is due to the following reasons: (1) difficulty in depositing good crystalline ferroelectric thin film directly on silicon; (2) difficulty in cleaning; (3) strong retention problems; (4) single transistor arrays are not common; and (5) little theoretical work has been done on MFSFET devices.
From the analysis of MFMOS devices, it can be stated that lower ferroelectric capacitance results in higher memory window and lower programming voltage. Thicker film and lower .di-elect cons..sub.r material can result in lower ferroelectric capacitance. However, a thicker film could increase programming voltage with respect to the switching field. Common oxide ferroelectric materials exhibit higher .di-elect cons..sub.r and T.sub.c, while non-oxide ferroelectrics exhibit lower .di-elect cons..sub.r and T.sub.c. Oxide Pb.sub.5 Ge.sub.3 O.sub.11 thin film has very low .di-elect cons..sub.r and moderate T.sub.c (178.degree. C.). Table I compares the memory window of MFMOS devices with ferroelectric gate of Pb.sub.5 Ge.sub.3 O.sub.11, PZT and SrBi.sub.2 Ta.sub.2 O.sub.9 thin films. Even though the steady state polarization for Pb.sub.5 Ge.sub.3 O.sub.11 thin film is much lower than that for PZT and SrBi.sub.2 Ta.sub.2 O.sub.9 film films, the memory window for Pb.sub.5 Ge.sub.3 O.sub.11 gate controlled MFMOS device is larger than its counterparts due to its low .di-elect cons..sub.r. The properties of Pb.sub.5 Ge.sub.3 O.sub.11 thin film is listed in Table II.
TABLE I Memory Windows for MFMOS Devices with Various Ferroelectrics Ferroelectric Pb(Zr,Ti)O.sub.3 SrBi.sub.2 Ta.sub.2 O.sub.9 Pb.sub.5 Ge.sub.3 O.sub.11 P.sub.r (.mu.C/cm.sup.2) 15 7 3.5 .epsilon..sub.r 1000 280 35 d.sub.Ferro (.ANG.) 2000 2000 2000 V.sub.dep (V) 3.14 4.39 6.87 P.sub.r * (.mu.C/cm.sup.2) 2.4 0.8 0.25 when V.sub.dep = 0.5 V Memory Window 1.08 1.29 3.23 2P.sub.r */C.sub.F (V) Gate oxide (SiO.sub.2) thickness: 100 .ANG. Steady state V.sub.dep is assumed to be 0.5 V
TABLE II Comparison Various Ferroelectric Thin Films Material Pb(Zr.sub..chi. Ti.sub.1-.chi.)O.sub.3 SrBi.sub.2 (Ta.sub..chi. Nb.sub.1-.chi.)O.sub.9 Pb.sub.5 Ge.sub.3 O.sub.11 .epsilon..sub.r &gt;800 &lt;300 30-50 P.sub.r (.mu.C/cm.sup.2) 15-35 4-11 3.5 T.sub.C .about.350.degree. C. .about.300.degree. C. 178.degree. C. Melting Point &gt;1200.degree. C. &gt;1200.degree. C. 738.degree. C. d.sub.33 (CN.sup.-1) 2.1 .times. 10.sup.-10 in between 6.2 .times. 10.sup.-12 CVD Deposition 600-700.degree. C. 700-800.degree. C. 450-650.degree. C. Temperature Post Anneal no yes no Fatigue Pt: Yes no no RuO.sub.2 : No Structure Perovskite Layered Perovskite P3 Domain Walls 180.degree., 90.degree., 70.5.degree., 180.degree., 90.degree. 180.degree. 60.degree. Prefer MgO, SrTiO.sub.3, ?? c-axis prefer Orientation Al.sub.2 O.sub.3 orientation on oriented Ir and Pt
The above-mentioned comparison of films shows that PGO thin films have advantages in terms of low deposition temperatures, fatigue characteristics, and retention properties.
Ferroelectric thin films are usually oxide ceramics with high melting temperatures. Therefore, it is very difficult to reduce the deposition temperature lower than 600.degree. C. and still maintain the desired phases. This relationship holds regardless of deposition technique. For the most studied PZT thin films, for example, good electrical properties in conjunction with deposition temperatures below 600.degree. C. have not been reported. This problem could be due to metastable pyrochlore phases which tend to form in this temperature range. Although low temperature deposition are possible with improved precursors, or using plasma to enhance the dissociation of precursors, very research in this area has been reported. Recently, the fatigue-free bi-layered ferroelectrics, namely SrBi.sub.2 Ta.sub.2 O.sub.9 or SrBi.sub.2 Nb.sub.2 O.sub.9, have been produced by MOCVD, sol-gel and pulse laser deposition. However, the deposition temperatures are still greater than 700.degree. C. Further, CVD bi-layered ferroelectric thin films need post-annealing temperatures higher than 700.degree. C. for long time (&gt;1 hr) in order to obtain ferroelectricity.
An alternate method of solving the deposition temperature problem is to use alternate ferroelectric materials. PGO is a natural candidate because of its very low melting temperature (738.degree. C.). At room temperature, the uniaxial ferroelectric PGO system with its polar direction parallel to the c-axis, belongs to the trigonal crystal class (point group: P3). This material transforms to the hexagonal (point group: P6) paraelectric phase above the Curie temperature (T.sub.C =178.degree. C.).
Thin films of PGO were made by thermal evaporation, flash-evaporation, and dc reactive sputtering methods. Polycrystalline films with partial c-axis orientation on n-type Si substrates have been reported. Due to the absence of saturated hysteresis loops, film quality is unpredictable. Recently, PGO thin films have been fabricated by pulsed laser ablation, sol-gel. PGO thin films (1-2 um) deposited by pulsed laser ablation on Pt coated Si substrates showed distorted hysteresis loops (P.sub.r =2.5 uC/cm.sup.2 and E.sub.c =55 kV/cm). Crack-free and fully c-axis oriented PGO thin films (1600 .ANG.) were successfully fabricated by Lee at low temperature (450.degree. C. for 15 minutes) by sol-gel processing route on Pt/Ti/Si.sub.2 /Si substrates. A well saturated square hysteresis loop with near single crystal value of the remanent polarization (P.sub.r =3.3 uC/cm.sup.2), but a relatively high coercive field (E.sub.c =135 kV/cm) was reported. However, sol-gel processing can not be used for high dense FeRAM applications or commercial fabrication processes.
The PGO film of the present invention was developed meet the requirements of one transistor (1T) and one transistor/one capacitor 1T/1C) FeRAM memory devices. In co-pending patent application Ser. No. 09/301,435, entitled "Multi-Phase Lead Germanate Film and Deposition Method", invented by Tingkai Li et al., filed on Apr. 28, 1999, a second phase of Pb.sub.3 GeO.sub.5 is added to the Pb.sub.5 Ge.sub.3 O.sub.11, increasing polycrystalline grain sizes, without C-axis orientation. The resultant film had increased Pr values and dielectric constants, and decreased Ec values. Such a film is useful in making microelectromechanical systems (MEMS), high speed multichip modules (MCMs), DRAMs, and FeRAMs.
In co-pending patent application Ser. No. 09/301,620, entitled "C-Axis Oriented Lead Germanate Film and Deposition Method", invented by Tingkai Li et al., filed on Apr. 28, 1999, a PGO film is disclosed. This film has primarily a c-axis orientation with a smaller Pr value, smaller dielectric constant, and larger Ec value. Such a film is useful in making 1T memories.
In co-pending patent application Ser. No. 09/301,634, entitled "Ferroelastic Lead Germanate Film and Deposition Method", invented by Tingkai Li et al., filed on Apr. 28, 1999, a CVD Pb.sub.3 GeO.sub.5 film is described having improved ferroelastic properties useful in making MEMS and MCMs. The above-mentioned co-pending patent applications are incorporated herein by reference.
It would be advantageous if the ferroelectric properties of a single phase PGO film could be enhanced by crystallographic alignment. Further, it would be advantageous if the crystalline PGO film could be aligned primarily along the c-axis.
It would be advantageous if a ferroelectric PGO film could be commercially fabricated having phase uniformity and microstructure.
It would be advantageous if a single phase PGO film could be developed with ferroelectric properties associated with a single crystal structure.
It would be advantageous if the lattice mismatch could be minimized between ferroelectric capacitor electrodes and the intervening ferroelectric material. Further, it would be advantageous if the ferroelectric could be epitaxially grown from the electrode material to minimize the lattice mismatch.
Accordingly, in a lead germanium oxide (PGO) film, a method has been provided for forming an epitaxial PGO film having a c-axis orientation on a semiconductor wafer. The method comprising the steps of:
a) mixing [Pb(thd).sub.2 ] and [Ge(ETO).sub.4 ] to form a PGO mixture having a molar ratio in the range of approximately 5:3; PA1 b) dissolving the mixture of Step a) with a solvent of tetrahydrofuran, isopropanol, and tetraglyme in a molar ratio of approximately 8:2:1, respectively, to form a precursor solution having a concentration of approximately 0.05 to 0.2 moles of PGO mixture per liter of sol vent; PA1 c) using a precursor vaporizer, heating the precursor solution to a temperature in the range of approximately 170 to 250 degrees C., creating a precursor gas; PA1 c.sub.1) mixing the precursor gas in a reactor with an argon gas shroud flow in the range of approximately 3000 to 5000 standard cubic centimeters per minute (sccm), preheated to a temperature in the range of approximately 170 to 250 degrees C.; PA1 c.sub.2) introducing an oxygen flow to the reactor in the range of approximately 2000 to 3000 sccm; PA1 d) heating the wafer to a temperature in the range of approximately 480 to 550 degrees C., to decompose the precursor gas formed in Step c) on the wafer; PA1 e) epitaxially growing a PGO film on a conductive electrode overlying the semiconductor wafer, the PGO film including a first phase of Pb.sub.5 Ge.sub.3 O.sub.11, whereby a homogeneous film with ferroelectric characteristics is formed. PA1 g) forming a conductive electrode overlying the PGO film having a (111) orientation; and PA1 h) annealing the PGO film formed in Step e) at a temperature in the range of approximately 500 to 550 degrees C. The atmosphere is selected from the group of oxygen or oxygen with Pb atmospheres, whereby the interface between the PGO film, formed in Step e), and the electrode formed in Step g), is improved. PA1 Steps f) and h) include using a rapid thermal annealing (RTA) process to anneal the PGO film. The RTA process has a thermal rate in the range of approximately 10 to 200 degrees C. per second, and a time duration of approximately 10 to 1800 seconds.
In some aspects of the invention, Step e) includes epitaxially growing more than 99% of the Pb.sub.5 Ge.sub.3 O.sub.11 phase to have a c-axis crystallographic orientation, whereby the ferroelectric properties of PGO film are improved.
In some aspects of the invention, further steps follow Step e). Step f) anneals the PGO film formed in Step e) at a temperature in the range of approximately 500 to 550 degrees C. The atmosphere is controlled and selected to be from the group of oxygen, or oxygen with Pb atmospheres, whereby the c-axis orientation of the PGO film is enhanced;
In some aspects of the invention, a ferroelectric device is formed with the PGO film of in Step e), and includes further steps, following Step f), of:
A PGO film having improved ferroelectric properties is also provided. The PGO film comprises a first phase of Pb.sub.5 Ge.sub.3 O.sub.11. The Pb.sub.5 Ge.sub.3 O.sub.11 phase has a c-axis crystallographic orientation of greater than 99%, whereby the c-axis orientation and homogeneous structure promote ferroelectric film properties. In some aspects of the invention, the PGO film further comprises a second phase of Pb.sub.3 GeO.sub.5. The phase range of the Pb.sub.3 GeO.sub.5 film is approximately 0.1 to 5%.
A capacitor having ferroelectric properties is also provided. The capacitor comprises a first conductive electrode, a PGO film including a Pb.sub.5 Ge.sub.3 O.sub.11 phase with a c-axis crystallographic orientation of greater than 99% overlying the first electrode, and a second conductive electrode overlying the PGO film. The capacitor has a 2Pr of approximately 6.11 microcoulombs per centimeter squared (uC/Cm.sup.2) and a 2Ec of approximately 108 kilovolts per centimeter (kV/cm) at an applied voltage of 5 volts.